Testing VLTE01 Fault Detection Architectures for Inverted Binary Ring-LWE Construction Benchmarked on FPGA VLTE02 Time and Area Optimized Testing of Automotive ICs VLTE03 Functional Constraints in the Selection of Two-Cycle Gate-Exhaustive Faults for Test Generation VLTE04 Dugdugi: An Optimal Fault Addressing Scheme for Octagon-Like On-Chip Communication Networks VLTE05 On the Design of a Fault-Tolerant Scalable Three-Dimensional NoC-Based Digital Neuromorphic System with On-Chip Learning VLTE06 LPC: An Error Correction Code for Mitigating Faults in 3D Memories VLTE07 A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock VLTE08 Cluster-Aware Scattered Repair in Erasure-Coded Storage: Design and Analysis VLTE09 Reliable CRC-Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography VLTE10 Reliability-Aware Test Methodology for Detecting Short-Channel Faults in On-Chip Networks Read More >>
